Conference Proceedings
  1. Márton Erdős, Utpal Bora, Akshay Bhosale, Alexandra W Chadwick, Bob Lytton, Giacomo Gabrielli, Richard Cooper, Yuxin Guo, and Timothy M. Jones, “Loopfrog: In-core hint-based loop parallelization,” in Proceedings of The 58th IEEE/ACM International Symposium on Microarchitecture, Seoul, Korea, 2025, (Accepted to appear).
  2. Yuxin Guo, Akshay Bhosale, Alexandra W Chadwick, Utpal Bora, Márton Erdős, Giacomo Gabrielli, and Timothy M. Jones, “Ghost threading: Helper-thread prefetching for real systems,” in Proceedings of The 58th IEEE/ACM International Symposium on Microarchitecture, Seoul, Korea, 2025, (Accepted to appear).
  3. Akshay Bhosale and Rudolf Eigenmann. "Recurrence analysis for automatic parallelization of subscripted subscripts" in Proceedings of the 29th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, ser. PPoPP ’24, Edinburgh, United Kingdom: Association for Computing Machinery, 2024, pp. 392–403, isbn: 97984007043522403. DOI
  4. Akshay Bhosale and Rudolf Eigenmann. "On the automatic parallelization of subscripted subscript patterns using array property analysis". In Proceedings of the ACM International Conference on Supercomputing (ICS '21). Association for Computing Machinery, New York, NY, USA, 392–403. 2021. DOI
Journal Articles
  1. Akshay Bhosale, Parinaz Barakhshan, Miguel Romero Rosas., “Automatic and Interactive Program Parallelization Using the Cetus Source to Source Compiler Infrastructure v2.0,” Special Issue "Program Analysis and Optimizing Compilers for High-Performance Computing", Electronics. 2022; 11(5):809. DOI
Workshop proceedings
  1. Akshay Bhosale and Rudolf Eigenmann, “Compass: A combined parallel subscripted subscript benchmark suite,” in 36th International Workshop on Languages and Compilers for Parallel Computing (LCPC), Lexington, KY, USA, October 11–13, (Accepted to appear), 2023, p. 221.
  2. Akshay Bhosale, and Rudolf Eigenmann. "Compile-time Parallelization of Subscripted Subscript Patterns", in 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE, 2020.DOI
Patents
  1. Richard Cooper, Giacomo Gabrielli, Bob Lytton, Marton Erdos, Alexandra Winifred Chadwick, Akshay Bhosale, Utpal Bora, and Timothy Jones, “Handling reductions in micro-threaded code,” Patent Application No.: 202 511 074 400, Application filed in India, 2025.
  2. Giacomo Gabrielli, Bob Lytton, Richard Cooper, Alexandra Winifred Chadwick, Marton Erdos, Yuxin Guo, Utpal Bora, Akshay Bhosale, and Timothy Jones, “Support for parallel function continuations,” Patent Application No.: 202 511 074 398, Application filed in India, 2025.
  3. Giacomo Gabrielli, Bob Lytton, Ali Zaidi, Utpal Bora, Akshay Bhosale, Marton Erdos, and Timothy Jones, “Memory aliasing discriminators,” Patent Application No.: 202 511 074 399, Application filed in India, 2025.
Published Posters
  1. Alexandra W. Chadwick, Márton Erdős, Utpal Bora, Akshay Bhosale, Bob Lytton, Yuxin Guo, Richard Cooper, Giacomo Gabrielli, and Timothy M. Jones, “The future of instruction-level parallelism (ilp)”, 2025 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). DOI